Cinebench R23 - это кроссплатформенный набор тестов, который оценивает аппаратные возможности вашего компьютера. Усовершенствования Cinebench Release 23 отражают общие достижения ЦПУ и технологии рендеринга за последние годы, обеспечивая более точное измерение способности Cinema 4D использовать преимущества нескольких ядер ЦПУ и современные функции процессора, доступные для среднего пользователя.
AMD Ryzen 7 3700X Thermaltake Water 3.0 360 ARGB Sync ASUS ROG Strix B550-E Gaming 16Gb DDR4 3200MHz Patriot Viper 4 (PV416G320C6K) 3200MHz 16-17-17-36 CR1 Windows 10 x64 Pro
Результат 1288/12041 pts
Вложение:
Cinebench R23.png
У вас нет необходимых прав для просмотра вложений в этом сообщении. _________________ Гробы разработчиков надо делать круглыми, чтоб переворачиваться было удобно!
Последний раз редактировалось Alexandr82 14.11.2020 14:00, всего редактировалось 2 раз(а).
Member
Статус: Не в сети Регистрация: 19.02.2007 Откуда: Hamburg Germany Фото: 14
Ryzen 5800X @ 4875 CTR2.1 RC5 Water Custom
Cinebench R23 16264 multi 1611 single
Вложение:
Bild_2021-12-30_183127.png
У вас нет необходимых прав для просмотра вложений в этом сообщении. _________________ R75800X PBO+200+Chiller/Asus Strix B550-E/32GB BL16G36C16U4R 3800CL15/RX6800XT 2800/2150Ref+Chiller/Corsair AX850/M2980PRO1TB/LG38WK95C/Creative AE-7.
AMD Ryzen 9 5900X Thermaltake Water 3.0 360 ARGB Sync ASUS ROG Strix B550-E Gaming 16Gb DDR4 3200MHz Patriot Viper 4 (PV416G320C6K) 3533MHz 16-18-18-36 CR1 Windows 11 x64 Pro
Результат 1477/20979 pts
Вложение:
Cinebench R23.png
У вас нет необходимых прав для просмотра вложений в этом сообщении. _________________ Гробы разработчиков надо делать круглыми, чтоб переворачиваться было удобно!
maximus ix apex i9 9900kf @ 4.8 core, 4.5 ring 2x16 ballistix u4 1R @ 4000CL16
1276/12893
#77
bios settings
[2022/01/19 04:30:23] Ai Overclock Tuner [Manual] BCLK Frequency [100.0000] ASUS MultiCore Enhancement [Disabled] SVID Behavior [Worst-Case Scenario] AVX Instruction Core Ratio Negative Offset [0] CPU Core Ratio [Sync All Cores] 1-Core Ratio Limit [48] 2-Core Ratio Limit [48] 3-Core Ratio Limit [48] 4-Core Ratio Limit [48] 5-Core Ratio Limit [48] 6-Core Ratio Limit [48] 7-Core Ratio Limit [48] 8-Core Ratio Limit [48] BCLK Frequency : DRAM Frequency Ratio [100:133] DRAM Odd Ratio Mode [Disabled] DRAM Frequency [DDR4-4000MHz] Xtreme Tweaking [Enabled] TPU [Keep Current Settings] CPU SVID Support [Enabled] CPU Core/Cache Current Limit Max. [255.75] Ring Down Bin [Disabled] Min. CPU Cache Ratio [8] Max CPU Cache Ratio [45] BCLK Aware Adaptive Voltage [Auto] CPU Core/Cache Voltage [Offset Mode] - Offset Mode Sign [-] - CPU Core Voltage Offset [0.040] DRAM Voltage [1.3550] CPU VCCIO Voltage [1.13750] CPU System Agent Voltage [1.15000] PLL Termination Voltage [Auto] PCH Core Voltage [Auto] CPU Standby Voltage [Auto] DRAM CTRL REF Voltage on CHA [Auto] DRAM CTRL REF Voltage on CHB [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL0 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL1 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL2 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL3 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL4 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL5 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL6 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL7 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL0 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL1 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL2 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL3 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL4 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL5 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL6 [Auto] DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL7 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL0 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL1 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL2 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL3 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL4 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL5 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL6 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL7 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL0 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL1 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL2 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL3 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL4 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL5 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL6 [Auto] DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL7 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL0 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL1 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL2 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL3 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL4 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL5 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL6 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL7 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL0 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL1 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL2 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL3 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL4 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL5 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL6 [Auto] DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL7 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL0 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL1 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL2 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL3 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL4 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL5 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL6 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL7 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL0 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL1 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL2 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL3 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL4 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL5 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL6 [Auto] DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL7 [Auto] Realtime Memory Timing [Disabled] FCLK Frequency for Early Power On [Auto] Initial BCLK Frequency [Auto] BCLK Amplitude [Auto] BCLK Slew Rate [Auto] BCLK Spread Spectrum [Disabled] BCLK Frequency Slew Rate [Auto] DRAM VTT Voltage [Auto] VPPDDR Voltage [Auto] DMI Voltage [Auto] Core PLL Voltage [Auto] Internal PLL Voltage [Auto] GT PLL Voltage [Auto] Ring PLL Voltage [Auto] System Agent PLL Voltage [Auto] Memory Controller PLL Voltage [Auto] PLL Bandwidth [Auto] Eventual DRAM Voltage [Auto] Eventual CPU Standby Voltage [Auto] Eventual PLL Termination Voltage [Auto] Eventual DMI Voltage [Auto] Maximus Tweak [Mode 2] DRAM CAS# Latency [16] DRAM RAS# to CAS# Delay [18] DRAM RAS# ACT Time [36] DRAM Command Rate [2N] DRAM RAS# to RAS# Delay L [6] DRAM RAS# to RAS# Delay S [4] DRAM REF Cycle Time [592] DRAM Refresh Interval [65024] DRAM WRITE Recovery Time [16] DRAM READ to PRE Time [8] DRAM FOUR ACT WIN Time [16] DRAM WRITE to READ Delay [Auto] DRAM WRITE to READ Delay L [8] DRAM WRITE to READ Delay S [4] DRAM CKE Minimum Pulse Width [8] DRAM Write Latency [16] tRDRD_sg [7] tRDRD_dg [4] tRDWR_sg [12] tRDWR_dg [12] tWRWR_sg [7] tWRWR_dg [4] tWRRD_sg [30] tWRRD_dg [26] tRDRD_dr [0] tRDRD_dd [0] tRDWR_dr [0] tRDWR_dd [0] tWRWR_dr [0] tWRWR_dd [0] tWRRD_dr [0] tWRRD_dd [0] TWRPRE [36] TRDPRE [8] tREFIX9 [127] OREF_RI [0] MRC Fast Boot [Disabled] DRAM CLK Period [Auto] Memory Scrambler [Enabled] Channel A DIMM Control [Enabled] Channel B DIMM Control [Enabled] MCH Full Check [Enabled] Mem Over Clock Fail Count [Auto] Training Profile [User Profile] DLLBwEn [Auto] DRAM SPD Write [Disabled] XTU Setting [Auto] DRAM RTL INIT value [Auto] DRAM RTL (CHA DIMM0 Rank0) [60] DRAM RTL (CHA DIMM0 Rank1) [0] DRAM RTL (CHA DIMM1 Rank0) [0] DRAM RTL (CHA DIMM1 Rank1) [0] DRAM RTL (CHB DIMM0 Rank0) [61] DRAM RTL (CHB DIMM0 Rank1) [0] DRAM RTL (CHB DIMM1 Rank0) [0] DRAM RTL (CHB DIMM1 Rank1) [0] DRAM IOL (CHA DIMM0 Rank0) [6] DRAM IOL (CHA DIMM0 Rank1) [0] DRAM IOL (CHA DIMM1 Rank0) [0] DRAM IOL (CHA DIMM1 Rank1) [0] DRAM IOL (CHB DIMM0 Rank0) [6] DRAM IOL (CHB DIMM0 Rank1) [0] DRAM IOL (CHB DIMM1 Rank0) [0] DRAM IOL (CHB DIMM1 Rank1) [0] CHA IO_Latency_offset [21] CHB IO_Latency_offset [21] CHA RFR delay [14] CHB RFR delay [14] ODT RTT WR (CHA) [80 DRAM Clock] ODT RTT PARK (CHA) [48 DRAM Clock] ODT RTT NOM (CHA) [48 DRAM Clock] ODT RTT WR (CHB) [80 DRAM Clock] ODT RTT PARK (CHB) [48 DRAM Clock] ODT RTT NOM (CHB) [48 DRAM Clock] ODT_READ_DURATION [Auto] ODT_READ_DELAY [Auto] ODT_WRITE_DURATION [Auto] ODT_WRITE_DELAY [Auto] Data Rising Slope [Auto] Data Rising Slope Offset [Auto] Cmd Rising Slope [Auto] Cmd Rising Slope Offset [Auto] Ctl Rising Slope [Auto] Ctl Rising Slope Offset [Auto] Clk Rising Slope [Auto] Clk Rising Slope Offset [Auto] Data Falling Slope [Auto] Data Falling Slope Offset [Auto] Cmd Falling Slope [Auto] Cmd Falling Slope Offset [Auto] Ctl Falling Slope [Auto] Ctl Falling Slope Offset [Auto] Clk Falling Slope [Auto] Clk Falling Slope Offset [Auto] CPU Load-line Calibration [Default] CPU Current Capability [140%] CPU VRM Switching Frequency [Auto] Active Frequency Mode [Enabled] CPU Power Duty Control [T.Probe] CPU Power Phase Control [Extreme] CPU Power Thermal Control [120] CPU VRM Thermal Control [Enabled] DRAM Current Capability [130%] DRAM Switching Frequency [Manual] Fixed DRAM Switching Frequency(KHz) [400] CPU Core/Cache Boot Voltage [Auto] DMI Boot Voltage [Auto] Core PLL Boot Voltage [Auto] CPU System Agent Boot Voltage [Auto] CPU VCCIO Boot Voltage [Auto] PLL Termination Boot voltage [Auto] CPU Standby Boot Voltage [Auto] Intel(R) SpeedStep(tm) [Disabled] Turbo Mode [Enabled] Long Duration Package Power Limit [4095] Package Power Time Window [127] Short Duration Package Power Limit [4095] IA AC Load Line [Auto] IA DC Load Line [Auto] TVB Voltage Optimizations [Enabled] Hyper-Threading [Enabled] Thermal Monitor [Enabled] Maximum CPU Core Temperature [Auto] Active Processor Cores [All] Intel Virtualization Technology [Disabled] Hardware Prefetcher [Enabled] Adjacent Cache Line Prefetch [Enabled] Boot performance mode [Auto] SW Guard Extensions (SGX) [Disabled] Tcc Offset Time Window [Auto] Execute Disable Bit [Disabled] SMM Code Access Check [Enabled] SMM Use Delay Indication [Enabled] SMM Use Block Indication [Enabled] Intel(R) SpeedStep(tm) [Disabled] Turbo Mode [Enabled] CPU C-states [Disabled] CFG Lock [Disabled] Intel(R) Speed Shift Technology [Enabled] Number of P states [0] Acoustic Noise Mitigation [Disabled] Disable Fast PKG C State Ramp for IA Domain [FALSE] Slow Slew Rate for IA Domain [Fast/2] Disable Fast PKG C State Ramp for GT Domain [FALSE] Slow Slew Rate for GT Domain [Fast/2] Disable Fast PKG C State Ramp for SA Domain [FALSE] Slow Slew Rate for SA Domain [Fast/2] Configurable TDP Boot Mode [Nominal] Configurable TDP Lock [Disabled] CTDP BIOS control [Disabled] Power Limit 1 [0] Power Limit 2 [0] Power Limit 1 Time Window [0] ConfigTDP Turbo Activation Ratio [0] Overclocking Lock [Disabled] PCI Express Native Power Management [Disabled] PCH DMI ASPM [Disabled] ASPM [Disabled] DMI Link ASPM Control [Disabled] PEG - ASPM [Disabled] PTID Support [Enabled] PECI Access Method [Direct I/O] PCI Express Native Power Management [Disabled] BDAT ACPI Table Support [Disabled] Wake system from S5 [Disabled] ACPI Debug [Disabled] Low Power S0 Idle Capability [Disabled] Lpit Recidency Counter [SLP S0] PCI Delay Optimization [Disabled] ZpODD Support [Disabled] Type C Support [Enabled] PEP CPU [Enabled] PEP Graphics [Enabled] PEP ISP [Disabled] PEP SATA Controller [Enabled] PEP RAID VOL0 [Disabled] PEP SATA PORT0 [Disabled] PEP SATA PORT1 [Disabled] PEP SATA PORT2 [Disabled] PEP SATA PORT3 [Disabled] PEP SATA PORT4 [Disabled] PEP SATA PORT5 [Disabled] PEP SATA NVM1 [Disabled] PEP SATA NVM2 [Disabled] PEP SATA NVM3 [Disabled] PEP UART [Enabled] PEP I2C0 [Enabled] PEP I2C1 [Enabled] PEP I2C2 [Enabled] PEP I2C3 [Enabled] PEP I2C4 [Enabled] PEP I2C5 [Enabled] PEP SPI [Enabled] PEP XHCI [Enabled] PEP Audio [Enabled] PEP EMMC [Enabled] PEP SDXC [Enabled] VT-d [Disabled] Primary Display [Auto] iGPU Multi-Monitor [Disabled] DMI Max Link Speed [Gen3] PCIEX16/X8_1 Link Speed [Gen3] PCIEX8/X4_3 Link Speed [Gen3] PCIEX4_2 Link Speed [Gen3] PCIe Spread Spectrum Clocking [Disabled] IOAPIC 24-119 Entries [Enabled] PCIe Speed [Gen3] SATA Controller(s) [Disabled] Spin Up Device [Disabled] SATA Device Type [Hard Disk Drive] Topology [Unknown] SATA Port 0 DevSlp [Disabled] DITO Configuration [Disabled] DITO Value [625] DM Value [15] Spin Up Device [Disabled] SATA Device Type [Hard Disk Drive] Topology [Unknown] SATA Port 1 DevSlp [Disabled] DITO Configuration [Disabled] DITO Value [625] DM Value [15] Spin Up Device [Disabled] SATA Device Type [Hard Disk Drive] Topology [Unknown] SATA Port 2 DevSlp [Disabled] DITO Configuration [Disabled] DITO Value [625] DM Value [15] Spin Up Device [Disabled] SATA Device Type [Hard Disk Drive] Topology [Unknown] SATA Port 3 DevSlp [Disabled] DITO Configuration [Disabled] DITO Value [625] DM Value [15] Spin Up Device [Disabled] SATA Device Type [Hard Disk Drive] Topology [Unknown] SATA Port 4 DevSlp [Disabled] DITO Configuration [Disabled] DITO Value [625] DM Value [15] Spin Up Device [Disabled] SATA Device Type [Hard Disk Drive] Topology [Unknown] SATA Port 5 DevSlp [Disabled] DITO Configuration [Disabled] DITO Value [625] DM Value [15] Port 6 [Enabled] Hot Plug [Disabled] Spin Up Device [Disabled] SATA Device Type [Hard Disk Drive] Topology [Unknown] SATA Port 6 DevSlp [Disabled] DITO Configuration [Disabled] DITO Value [625] DM Value [15] Port 7 [Enabled] Hot Plug [Disabled] Spin Up Device [Disabled] SATA Device Type [Hard Disk Drive] Topology [Unknown] SATA Port 7 DevSlp [Disabled] DITO Configuration [Disabled] DITO Value [625] DM Value [15] PCI Express Root Port 1 [Enabled] Topology [Unknown] ASPM [Disabled] L1 Substates [Disabled] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE1 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE1 LTR Lock [Disabled] PCIE1 CLKREQ Mapping Override [Default] PCI Express Root Port 2 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE2 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE2 LTR Lock [Disabled] PCIE2 CLKREQ Mapping Override [Default] PCI Express Root Port 3 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE3 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE3 LTR Lock [Disabled] PCIE3 CLKREQ Mapping Override [Default] PCI Express Root Port 4 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE4 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE4 LTR Lock [Disabled] PCIE4 CLKREQ Mapping Override [Default] PCI Express Root Port 5 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE5 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE5 LTR Lock [Disabled] PCIE5 CLKREQ Mapping Override [Default] PCI Express Root Port 6 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE6 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE6 LTR Lock [Disabled] PCIE6 CLKREQ Mapping Override [Default] PCI Express Root Port 7 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [7] Reserved Memory [17] Reserved I/O [16] PCH PCIE7 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE7 LTR Lock [Disabled] PCIE7 CLKREQ Mapping Override [Default] PCI Express Root Port 8 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [7] Reserved Memory [17] Reserved I/O [8] PCH PCIE8 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE8 LTR Lock [Disabled] PCIE8 CLKREQ Mapping Override [Default] PCI Express Root Port 9 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE9 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE9 LTR Lock [Disabled] PCIE9 CLKREQ Mapping Override [Default] PCI Express Root Port 10 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE10 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE10 LTR Lock [Disabled] PCIE10 CLKREQ Mapping Override [Default] PCI Express Root Port 11 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE11 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE11 LTR Lock [Disabled] PCIE11 CLKREQ Mapping Override [Default] PCI Express Root Port 12 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE12 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE12 LTR Lock [Disabled] PCIE12 CLKREQ Mapping Override [Default] PCI Express Root Port 13 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE13 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE13 LTR Lock [Disabled] PCIE13 CLKREQ Mapping Override [Default] PCI Express Root Port 14 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE14 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE14 LTR Lock [Disabled] PCIE14 CLKREQ Mapping Override [Default] PCI Express Root Port 15 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE15 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE15 LTR Lock [Disabled] PCIE15 CLKREQ Mapping Override [Default] PCI Express Root Port 16 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE16 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE16 LTR Lock [Disabled] PCIE16 CLKREQ Mapping Override [Default] PCI Express Root Port 17 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE17 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE17 LTR Lock [Disabled] PCIE17 CLKREQ Mapping Override [Default] PCI Express Root Port 18 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE18 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE18 LTR Lock [Disabled] PCIE18 CLKREQ Mapping Override [Default] PCI Express Root Port 19 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE19 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE19 LTR Lock [Disabled] PCIE19 CLKREQ Mapping Override [Default] PCI Express Root Port 20 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE20 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE20 LTR Lock [Disabled] PCIE20 CLKREQ Mapping Override [Default] PCI Express Root Port 21 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE21 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE21 LTR Lock [Disabled] PCIE20 CLKREQ Mapping Override [Default] PCI Express Root Port 22 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE22 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE22 LTR Lock [Disabled] PCIE20 CLKREQ Mapping Override [Default] PCI Express Root Port 23 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE23 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE23 LTR Lock [Disabled] PCIE20 CLKREQ Mapping Override [Default] PCI Express Root Port 24 [Enabled] Topology [Unknown] ASPM [Auto] L1 Substates [L1.1 & L1.2] Gen3 Eq Phase3 Method [Software Search] UPTP [5] DPTP [7] ACS [Enabled] URR [Disabled] FER [Disabled] NFER [Disabled] CER [Disabled] CTO [Disabled] SEFE [Disabled] SENFE [Disabled] SECE [Disabled] PME SCI [Enabled] Hot Plug [Disabled] Advanced Error Reporting [Enabled] PCIe Speed [Auto] Transmitter Half Swing [Disabled] Detect Timeout [0] Extra Bus Reserved [0] Reserved Memory [10] Reserved I/O [4] PCH PCIE24 LTR [Enabled] Snoop Latency Override [Auto] Non Snoop Latency Override [Auto] Force LTR Override [Disabled] PCIE24 LTR Lock [Disabled] PCIE20 CLKREQ Mapping Override [Default] Audio DSP [Disabled] HDA-Link Codec Select [Platform Onboard] iDisplay Audio Disconnect [Disabled] PME Enable [Disabled] SerialIO timing parameters [Disabled] TPM Device Selection [dTPM] PTP aware OS [Not PTP Aware] Me FW Image Re-Flash [Disabled] Local FW Update [Enabled] HECI Timeouts [Enabled] Force ME DID Init Status [Disabled] CPU Replaced Polling Disable [Disabled] ME DID Message [Enabled] HECI Retry Disable [Disabled] HECI Message check Disable [Disabled] MBP HOB Skip [Disabled] HECI2 Interface Communication [Disabled] KT Device [Enabled] IDER Device [Enabled] End Of Post Message [Send in DXE] D0I3 Setting for HECI Disable [Disabled] Select Camera [Ivcam] Delay needed for Ivcam power on [0] Delay needed for Ivcam power off [0] Rotation [0] DFU support [Disabled] Wake support [Disabled] tRd2RdSG [0] tRd2RdDG [0] tRd2RdDR [0] tRd2RdDD [0] tRd2WrSG [0] tRd2WrDG [0] tRd2WrDR [0] tRd2WrDD [0] tWr2RdSG [0] tWr2RdDG [0] tWr2RdDR [0] tWr2RdDD [0] tWr2WrSG [0] tWr2WrDG [0] tWr2WrDR [0] tWr2WrDD [0] Core PLL Voltage Offset [0] GT PLL Voltage Offset [0] Ring PLL Voltage Offset [0] System Agent PLL Voltage Offset [0] Memory Controller PLL Voltage Offset [0] ASF support [Enabled] USB Provisioning of AMT [Disabled] Activate Remote Assistance Process [Disabled] CIRA Timeout [0] PET Progress [Enabled] WatchDog [Disabled] OS Timer [0] BIOS Timer [0] Secure Erase mode [Simulated] Force Secure Erase [Disabled] MEBx hotkey Pressed [Disabled] MEBx Selection Screen [Disabled] Hide Unconfigure ME Confirmation Prompt [Disabled] MEBx OEM Debug Menu Enable [Disabled] Unconfigure ME [Disabled] Non-UI Mode Resolution [Auto] UI Mode Resolution [Auto] Graphics Mode Resolution [Auto] Security Device Support [Enable] Security Device Support [Enable] SHA-1 PCR Bank [Enabled] SHA256 PCR Bank [Enabled] SHA384 PCR Bank [Disabled] SHA512 PCR Bank [Disabled] SM3_256 PCR Bank [Disabled] Pending operation [None] Platform Hierarchy [Enabled] Storage Hierarchy [Enabled] Endorsement Hierarchy [Enabled] TPM2.0 UEFI Spec Version [TCG_2] Physical Presence Spec Version [1.3] Detect Non-Compliance Device [Disabled] Prefetchable Memory [10] Reserved Memory Alignment [1] Prefetchable Memory Alignment [1] Detect Non-Compliance Device [Disabled] Prefetchable Memory [10] Reserved Memory Alignment [1] Prefetchable Memory Alignment [1] Detect Non-Compliance Device [Disabled] Prefetchable Memory [10] Reserved Memory Alignment [1] Prefetchable Memory Alignment [1] Detect Non-Compliance Device [Disabled] Prefetchable Memory [10] Reserved Memory Alignment [1] Prefetchable Memory Alignment [1] Detect Non-Compliance Device [Disabled] Prefetchable Memory [10] Reserved Memory Alignment [1] Prefetchable Memory Alignment [1] Detect Non-Compliance Device [Disabled] Prefetchable Memory [10] Reserved Memory Alignment [1] Prefetchable Memory Alignment [1] Detect Non-Compliance Device [Disabled] Prefetchable Memory [10] Reserved Memory Alignment [1] Prefetchable Memory Alignment [1] Detect Non-Compliance Device [Disabled] Prefetchable Memory [10] Reserved Memory Alignment [1] Prefetchable Memory Alignment [1] Detect Non-Compliance Device [Disabled] Prefetchable Memory [10] Reserved Memory Alignment [1] Prefetchable Memory Alignment [1] Detect Non-Compliance Device [Disabled] Prefetchable Memory [10] Reserved Memory Alignment [1] Prefetchable Memory Alignment [1] Detect Non-Compliance Device [Disabled] Prefetchable Memory [10] Reserved Memory Alignment [1] Prefetchable Memory Alignment [1] Detect Non-Compliance Device [Disabled] Prefetchable Memory [10] Reserved Memory Alignment [1] Prefetchable Memory Alignment [1] Detect Non-Compliance Device [Disabled] Prefetchable Memory [10] Reserved Memory Alignment [1] Prefetchable Memory Alignment [1] Onboard LED [Enabled] Q-Code LED Function [Auto] ErP Ready [Disabled] Restore AC Power Loss [Power Off] Power On By PCI-E/PCI [Disabled] Power On By RTC [Disabled] HD Audio Controller [Enabled] M.2_2 Configuration [PCIE mode] Asmedia Back USB 3.1 Controller [Disabled] When system is in working state [On] When system is in sleep, hibernate or soft off states [On] 5G LAN Card [Disabled] Intel LAN Controller [Enabled] Intel LAN PXE Option ROM [Disabled] Detect Non-Compliance Device [Disabled] Primary PEG [Auto] Primary PCIE [Auto] Network Stack [Disabled] Legacy USB Support [Disabled] USB Keyboard and Mouse Simulator [Disabled] silicon-power PMAP [Auto] U31G1_1 [Enabled] U31G1_2 [Enabled] U31G1_3 [Enabled] U31G1_4 [Enabled] U31G1_5 [Enabled] U31G1_6 [Enabled] U31G1_7 [Enabled] U31G1_8 [Enabled] USB_9 [Enabled] USB_10 [Enabled] USB_11 [Enabled] USB_12 [Enabled] USB_13 [Enabled] USB_14 [Enabled] CPU Temperature [Monitor] MotherBoard Temperature [Monitor] VRM Temperature [Monitor] PCH Temperature [Monitor] T_Sensor1 Temperature [Monitor] T_Sensor2 Temperature [Monitor] DIMM.2 Sensor 1 [Monitor] DIMM.2 Sensor 2 [Monitor] Water In T Sensor [Monitor] Water Out T Sensor [Monitor] CPU Fan Speed [Monitor] Chassis Fan 1 Speed [Monitor] Chassis Fan 2 Speed [Monitor] Chassis Fan 3 Speed [Monitor] AIO PUMP Speed [Monitor] CPU Optional Fan Speed [Monitor] W_PUMP+ Speed [Monitor] Flow Rate [Monitor] CPU Core Voltage [Monitor] 3.3V Voltage [Monitor] 5V Voltage [Monitor] 12V Voltage [Monitor] CPU Q-Fan Control [PWM Mode] CPU Fan Step Up [0 sec] CPU Fan Step Down [0 sec] CPU Fan Speed Lower Limit [Ignore] CPU Fan Profile [Manual] CPU Upper Temperature [75] CPU Fan Max. Duty Cycle (%) [100] CPU Middle Temperature [60] CPU Fan Middle. Duty Cycle (%) [67] CPU Lower Temperature [35] CPU Fan Min. Duty Cycle (%) [33] AIO_PUMP/W_PUMP+ Control [Disabled] Chassis Fan 1 Q-Fan Control [Auto] Chassis Fan 1 Q-Fan Source [CPU] Chassis Fan 1 Step Up [0 sec] Chassis Fan 1 Step Down [0 sec] Chassis Fan 1 Speed Low Limit [200 RPM] Chassis Fan 1 Profile [Standard] Chassis Fan 2 Q-Fan Control [Auto] Chassis Fan 2 Q-Fan Source [CPU] Chassis Fan 2 Step Up [0 sec] Chassis Fan 2 Step Down [0 sec] Chassis Fan 2 Speed Low Limit [200 RPM] Chassis Fan 2 Profile [Standard] Chassis Fan 3 Q-Fan Control [PWM Mode] Chassis Fan 3 Q-Fan Source [CPU] Chassis Fan 3 Step Up [0 sec] Chassis Fan 3 Step Down [0 sec] Chassis Fan 3 Speed Low Limit [Ignore] Chassis Fan 3 Profile [Manual] Chassis Fan 3 Upper Temperature [75] Chassis Fan 3 Max. Duty Cycle (%) [100] Chassis Fan 3 Middle Temperature [60] Chassis Fan 3 Middle. Duty Cycle (%) [67] Chassis Fan 3 Lower Temperature [35] Chassis Fan 3 Min. Duty Cycle (%) [33] Fast Boot [Enabled] Next Boot after AC Power Loss [Normal Boot] Above 4G Decoding [Enabled] Boot Logo Display [Auto] POST Delay Time [0 sec] Boot up NumLock State [Enabled] Wait For 'F1' If Error [Disabled] Option ROM Messages [Enabled] Interrupt 19 Capture [Disabled] Setup Mode [Advanced Mode] Boot Sector (MBR/GPT) Recovery Policy [Local User Control] Next Boot Recovery Action [Skip] Launch CSM [Disabled] OS Type [Other OS] Setup Animator [Disabled] Load from Profile [8] Profile Name [Test] Save to Profile [8] CPU Core Voltage [Auto] VCCSA Voltage [Auto] BCLK Frequency [Auto] CPU Ratio [Auto] Cache Ratio [Auto] Bus Interface [PCIEX16/X8_1]
Почему-то сайнбенч повесил тест single core на 12 поток, на котором висит обработка прерываний видеокарты и pci-e x16 контроллера. Возможно результат в однопотоке был бы лучше, но мне лень перекидывать обработку на другой поток и снова ждать полчаса single core.
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