procedure tCPUid.FillCacheInfoIntel;
  procedure CacheInfoIntel(CacheInfo: integer);
  begin
     case (CacheInfo) of
        $06: begin CacheL1I:=8;L1ITUWays:=4;L1ITULines:=32;   end;
        $08: begin CacheL1I:=16;L1ITUWays:=4;L1ITULines:=32; end;

        $0A: begin CacheL1D:=8;L1DWays:=2;L1DLines:=32;   end;
        $0C: begin CacheL1D:=16;L1DWays:=4;L1DLines:=32; end;

        $10: begin CacheL1D:=16;L1DWays:=4;L1DLines:=32; end;   // IA-64
        $15: begin CacheL1I:=16;L1ITUWays:=4;L1ITULines:=32; end;   // IA-64
        $1A: begin CacheL2:=96;L2Ways:=6;L2Lines:=64;   end; // IA-64

        $22: begin CacheL3:=512;L3Ways:=4;L3Lines:=64; end;
        $23: begin CacheL3:=1024;L3Ways:=8;L3Lines:=64;   end;
        $25: begin CacheL3:=2048;L3Ways:=8;L3Lines:=64;   end;
        $29: begin CacheL3:=4096;L3Ways:=8;L3Lines:=64;   end;

        $2C: begin CacheL1D:=32;L1DWays:=8;L1DLines:=64; end;
        $30: begin CacheL1I:=32;L1ITUWays:=8;L1ITULines:=64; end;

        $39: begin CacheL2:=128;L2Ways:=4;L2Lines:=64; end;
        $3B: begin CacheL2:=128;L2Ways:=2;L2Lines:=64; end;
        $3C: begin CacheL2:=256;L2Ways:=4;L2Lines:=64; end;

     $40: if(Family=6) then CacheL2:=0
                         else CacheL3:=0;

        $41: begin CacheL2:=128;L2Ways:=4;L2Lines:=32; end;
        $42: begin CacheL2:=256;L2Ways:=4;L2Lines:=32; end;
        $43: begin CacheL2:=512;L2Ways:=4;L2Lines:=32; end;
      $44: begin CacheL2:=1024;L2Ways:=4;L2Lines:=32; end;
      $45: begin CacheL2:=2048;L2Ways:=4;L2Lines:=32; end;

        $60: begin CacheL1D:=16;L1DWays:=8;L1DLines:=64; end;   // Prescott
        $66: begin CacheL1D:=8;L1DWays:=4;L1DLines:=64; end;
        $67: begin CacheL1D:=16;L1DWays:=4;L1DLines:=64; end;
        $68: begin CacheL1D:=32;L1DWays:=4;L1DLines:=64; end;

        $70: begin CacheL1T:=12;L1ITUWays:=8; end;
        $71: begin CacheL1T:=16;L1ITUWays:=8; end;
        $72: begin CacheL1T:=32;L1ITUWays:=8; end;

        $77: begin CacheL1I:=16;L1ITUWays:=8;L1ITULines:=64; end;   // IA-64

        $79: begin CacheL2:=128;L2Ways:=8;L2Lines:=64; end;
        $7A: begin CacheL2:=256;L2Ways:=8;L2Lines:=64; end;
        $7B: begin CacheL2:=512;L2Ways:=8;L2Lines:=64; end;
        $7C: begin CacheL2:=1024;L2Ways:=8;L2Lines:=64; end;
        $7D: begin CacheL2:=2048;L2Ways:=8;L2Lines:=64; end;
        $7E: begin CacheL2:=256;L2Ways:=8;L2Lines:=128; end;
        $7F: begin CacheL2:=512;L2Ways:=2;L2Lines:=64; end;

        $81: begin CacheL2:=128;L2Ways:=8;L2Lines:=32; end;
        $82: begin CacheL2:=256;L2Ways:=8;L2Lines:=32; end;
        $83: begin CacheL2:=512;L2Ways:=8;L2Lines:=32; end;
        $84: begin CacheL2:=1024;L2Ways:=8;L2Lines:=32; end;
        $85: begin CacheL2:=2048;L2Ways:=8;L2Lines:=32; end;

        $86: begin CacheL2:=512;L2Ways:=8;L2Lines:=64; end;
        $87: begin CacheL2:=1024;L2Ways:=8;L2Lines:=64; end;

        $88: begin CacheL3:=2048;L3Ways:=4;L3Lines:=64; end; // IA-64
        $89: begin CacheL3:=4096;L3Ways:=4;L3Lines:=64; end; // IA-64
        $8A: begin CacheL3:=8192;L3Ways:=4;L3Lines:=64; end; // IA-64

        $8D: begin CacheL3:=3096;L3Ways:=12;L3Lines:=128; end; // IA-64
     end;
     case L2Ways of
       $0: L2WaysS:='None';
       else
         L2WaysS:=IntToStr(L2Ways)+'-way';
     end;
     case L3Ways of
       $0: L3WaysS:='None';
       else
         L3WaysS:=IntToStr(L3Ways)+'-way';
     end;
   end;
begin
   cpuid($00000002, EAX, EBX, ECX, EDX);

   CacheInfoIntel((EAX and $FF000000) shr 24);
   CacheInfoIntel((EAX and $00FF0000) shr 16);
   CacheInfoIntel((EAX and $0000FF00) shr 8);
   CacheInfoIntel( EAX and $000000FF);
   CacheInfoIntel((EBX and $FF000000) shr 24);
   CacheInfoIntel((EBX and $00FF0000) shr 16);
   CacheInfoIntel((EBX and $0000FF00) shr 8);
   CacheInfoIntel( EBX and $000000FF);
   CacheInfoIntel((ECX and $FF000000) shr 24);
   CacheInfoIntel((ECX and $00FF0000) shr 16);
   CacheInfoIntel((ECX and $0000FF00) shr 8);
   CacheInfoIntel( ECX and $000000FF);
   CacheInfoIntel((EDX and $FF000000) shr 24);
   CacheInfoIntel((EDX and $00FF0000) shr 16);
   CacheInfoIntel((EDX and $0000FF00) shr 8);
   CacheInfoIntel( EDX and $000000FF);
end;